A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR

This paper presents the design of a double-sampling split Σ∆-modulation analog-to-digital converter with cross noisecoupling. Double-sampling is used to achieve high conversion speed and low power consumption. To tackle the problem of quantization noise folding due to path mismatch, a fully floating bilinear integrator is used. Then the quantization noise is crosscoupled between two identical Σ∆-modulators. This increases the effective noise shaping order of this structure with one. The final design is an optimized second order double-sampling split Σ∆modulator with third order noise shaping through cross noisecoupling. This design is simulated at transistor level in an 0.18μm CMOS process for 80 dB SNR and 5MHz bandwidth.